VBERippleCarryAdder
class qiskit.circuit.library.VBERippleCarryAdder(num_state_qubits, kind='full', name='VBERippleCarryAdder')
Bases: Adder
The VBE ripple carry adder [1].
This circuit performs inplace addition of two equally-sized quantum registers. As an example, a classical adder circuit that performs full addition (i.e. including a carry-in bit) on two 2-qubit sized registers is as follows:
┌────────┐ ┌───────────┐┌──────┐
cin_0: ┤0 ├───────────────────────┤0 ├┤0 ├
│ │ │ ││ │
a_0: ┤1 ├───────────────────────┤1 ├┤1 ├
│ │┌────────┐ ┌──────┐│ ││ Sum │
a_1: ┤ ├┤1 ├──■──┤1 ├┤ ├┤ ├
│ ││ │ │ │ ││ ││ │
b_0: ┤2 Carry ├┤ ├──┼──┤ ├┤2 Carry_dg ├┤2 ├
│ ││ │┌─┴─┐│ ││ │└──────┘
b_1: ┤ ├┤2 Carry ├┤ X ├┤2 Sum ├┤ ├────────
│ ││ │└───┘│ ││ │
cout_0: ┤ ├┤3 ├─────┤ ├┤ ├────────
│ ││ │ │ ││ │
helper_0: ┤3 ├┤0 ├─────┤0 ├┤3 ├────────
└────────┘└────────┘ └──────┘└───────────┘
Here Carry and Sum gates correspond to the gates introduced in [1]. Carry_dg correspond to the inverse of the Carry gate. Note that in this implementation the input register qubits are ordered as all qubits from the first input register, followed by all qubits from the second input register. This is different ordering as compared to Figure 2 in [1], which leads to a different drawing of the circuit.
The following generic gate objects perform additions, like this circuit class, but allow the compiler to select the optimal decomposition based on the context. Specific implementations can be set via the HLSConfig
, e.g. this circuit can be chosen via Adder=["ripple_v95"]
.
ModularAdderGate
: A generic inplace adder, modulo . This
is functionally equivalent to kind="fixed"
.
AdderGate
: A generic inplace adder. This
is functionally equivalent to kind="half"
.
FullAdderGate
: A generic inplace adder, with a carry-in bit. This
is functionally equivalent to kind="full"
.
References:
[1] Vedral et al., Quantum Networks for Elementary Arithmetic Operations, 1995. arXiv:quant-ph/9511018
Parameters
- num_state_qubits (int) – The size of the register.
- kind (str) – The kind of adder, can be
'full'
for a full adder,'half'
for a half adder, or'fixed'
for a fixed-sized adder. A full adder includes both carry-in and carry-out, a half only carry-out, and a fixed-sized adder neither carry-in nor carry-out. - name (str) – The name of the circuit.
Raises
ValueError – If num_state_qubits
is lower than 1.
Attributes
name
Type: str
A human-readable name for the circuit.
Example
from qiskit import QuantumCircuit
qc = QuantumCircuit(2, 2, name="my_circuit")
print(qc.name)
my_circuit